Instructor Bio
Extensive working experience in ASIC flow, IP/SOC Verification and Validation. Expertise in development of reusable verification environment using System verilog UVM. Knowledge on both subsystem level and SOC verification. Expertise in Flow setup using scripting languages Perl, Python, Make file and Shell Scripts.
Publications in international conferences on ASICverification methodology and verification flow.
Publications in international conferences on ASICverification methodology and verification flow.
Kiran Bhaskar Courses
Digital RTL design and Verilog interview questions (2021)
0.0 (0 Reviews)
Provider: Udemy
Time: 39 mins on-demand videoh
$11.99
