Complete Verilog HDL programming with Examples and Projects (Udemy.com)
Fundamentals, Design flow, modeling levels, Datatypes, test bench, Tasks & system tasks, FSM, FPGA & examples & Projects
Created by: Surender Reddy T
Last updated June 2023
What you will learn
- Learning Verilog HDL Programming fundamental concepts and properties compare to C Language, feature & advantages of Verilog HDL over VHDL
- VLSI Design flow ( FPGA & ASIC) and Difference between FPGA vs ASIC
- Different design methodologies in Verilog HDL programming with examples
- Behavioral modeling with blocking & Non-Blocking concepts and real time examples
- Test bench Verilog program with examples
- Task & system tasks with examples for random data generator, file based operations and memory load operations, and file representation input & output etc.
- Finite state machine (FSM) with example for both Mealy & Moore and Sequence detector FSM
- Complete design & test bench programming for Memory controllers
- Complete design & test bench programming for FIFO controller
How it compares
Against the other 295 rated Udemy courses in Arduino on CourseDuck:
- Rating4.3 out of 5higher than 36% of them
- Reviews386#82 of 296 by number of reviews
- Length8.2 hourslonger than 68% of them
- Last updatedJune 2023more recently than 50% of them
Course Description
Complete Verilog HDL programming course with a perfect, well structured and concise course for freshers and experienced, as it is from fundamental level to the application level. This course discuss the concepts in Verilog HDL programming and properties compared with C-Language and discussing the features and advantages.
In this course we give information related to VLSI design flow for FPGA & ASIC and gives overview about both.
This course gives information on different styles of programming like Gate level, Data flow, Behavioral and switch level with examples.
This course gives clear picture on verification, i.e. simulation and writing a test bench and some general examples like counter, clock diver using counter, pulse generator.
This courses explains how to write verification models using test benches with task and system tasks with Examples. These examples includes, file based system tasks such as writing data in to file, reading data from file and loading data in to memory and random data generator.
This courses shows clear picture on Finite State Machines (FSM)
how to draw,
how to realize it in to hardware model
how ro translate in to verilog code for both Mealy & Moore FSM with examples.
This course also shows some projects like Memory controller, FIFO controller and Error detection & correction using Hamming code, this improves ability to analyse and approach to Projects.
Finally it gives basic knowledge on FPGA's like core concept how bit file is loaded in to FPGA.
Instructor Details
- 4.3 Rating
386 Reviews
Surender Reddy T
I have more than 15 years of experience as a Developer. I have worked on different projects in software and hardware models, on System Verilog and Java. I have a Master's in Digital Systems and Computer Electronics from Jawaharlal Nehru Technological University Hyderabad.
I have worked on FPGA, ARM, and RISC developments.
Also worked with Spring Boot and MicroServices.
I am interested in AI and ML and plan to work on emerging technologies like Natural Language Programming and prompt engineering.
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Reviews
By sharmila L on 8/25/2025
Learnt a more from this course .Useful .I got better understanding of verilog.
By Manoj Kumar on 7/17/2025
it is soo good that than i expected but there are some topices which contain small duration that you cannot understand completly
By Karishma Goswami on 9/2/2024
it's good, came to know many small small new things, I mean depth the design of course is so nice, like it starts with why what and how
By Potharaju Ramesh on 8/23/2024
Thank you sir and thank you Udemy team for your outstanding lectures, complete with engaging illustrations. Given the growing demand for VLSI engineers in the industry, I believe this course is exceptionally valuable. I truly appreciate your efforts in creating such informative and visually appealing videos.
By James Hume on 1/22/2024
I felt that the information is quite shallow at points - I ended up having to google multiple times to clarify things and found better explanations almost instantly. He jumps around quite a bit too and randomly introduces new syntax without explanation. So far a little disappointed I'm afraid. And the more resources I read online, the more this course just wasn't worth the time or money. Just look on something like nandland.com... although having gone a bit further through now... maybe not as bad as I first though...
By Nirmol Munvar on 8/11/2022
This course helped me alot to revise and revisit all the concepts that i had to refurbish from scratch. The speaker is excellent and the projects are well explained.
By Chandra Keerthi Pothina on 6/27/2022
I have made it half way through and so far I have been liking the course. But, I think this course is for someone who is acquainted with verilog basics and digital electonics as it is a little fast paced. It does cover everything though.
By Vineet S on 1/28/2022
During some sessions the communication is not clear and very fast.Not that understandable during those times. But overall its a great learning.
By Priyusha K on 7/26/2021
Course content is really awesome. I highly recommend this course since instructor explains basic concepts in understandable way.
By NITHESH TELARU on 9/23/2020
With out any digital knowledge now I am able to write verilog programminng using FSM with common sence and no textbook has described about the true difference between C language and verilog. Truely worthy to take this program.
Quality Score
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Overall Score : 86 / 100






