Embedded System Design with Xilinx Zynq SoC and Vitis IDE (Udemy.com)

듣기 힘든 영어여서 쉽지는 않았지만, 구성된 강의가 상당히 자세하고 따라하면 익힐수 있게 되어 있음. FPGA Logic만 하는 분들도 들으면 좋은 강의입니다. 시간이 걸리더라도 모두 하나씩 해 보면 실력이 많이 향상 될 수 있는 좋은 강의 입니다.

Detailed explanation helps me to understand the concepts better. If you could add expert level like Ethernet, HDMI, etc. It will become a complete guide.

Good detail and good examples. Nice transition from PS to PL to show how things fit together. I was more interested in the PL side (C code) but the PS walkthroughs were helpful. Provided me what I needed.

Course included a lot of helpful material for beginners and i learnt a lot about Vitis, but the course suffered from the following 1) No use of the HP port on the PS. 2)No use of important mechanisms like DMA, the use of the onboard DDR memory and ps-pl communication using a fabric application. 3)Some lectures were updated, where as others didn't and felt out of place.

This course is best those who want to learn the vitis and implement in the actual hardware it show both the platform project and application project

The teacher is sometimes a little difficult to understand because English is not his native language, but once you zero in on his way of speaking you can easily follow the classes. I wish that the classes had assignments, however I decided to just follow along and duplicate the coding work. The c-code is not completely kosher here and there, but they are simple examples. The teacher could have spend a section on explaining how to set up the hardware for the JTAG debugger. It is fully skipped over and for some that will be difficult to figure out on their own if there is no prior experience.

The essential is good. The microphone recording has a dynamic compression which makes less intelligible. It’s easy to fix. Also after it was recorded. Anyway, that doesn’t diminish the value.

This is a great place to start working with Xilinx devices with processing systems. The coverage is quite good and fairly broad. There are some issues with production quality - sound and cutting, but nothing to detract from the information delivered.

The course wall well structured. It benefits both fresher and intermediate embedded developers in capturing the full scope of Vivado and Vitis system design!

I want to ensure that I respect this instructor and his level of knowledge in this field. However, the poor recording quality and wording makes the whole experience horrible. So, my apology to the instructor for the negative feedback. It might be useful for him to correct these issues in the future. I suggest him to write all what he will say and read it without extra words. This way the course will be perfect.