VSD - Circuit Design & SPICE Simulations - Part 1 (Udemy.com)
Learn how things got started in VLSI
Created by: Kunal Ghosh
Produced in 2016
What you will learn
- Understand, in brief, Physics of MOSFET
- Run SPICE simulations on your own and test your own circuits
- Get better understanding of Timing Analysis
- Learn VLSI from scratch to advanced (this includes my other courses as well)
Quality Score
Overall Score : 90 / 100
Course Description
OR, say, you are a student, who already went through my previous courses on clock tree synthesis, physical design flow and crosstalk,
But, sit back, and give it a thought "Have you done it all?" "Did you know, where does the delay of a cell actually comes from?" "We have learnt about delay models, but are the models accurate?" "How do you verify, if what you are doing in static timing analysis, is correct?" and many more.
These are some of curious questions we wonder about, but hardly find any answers. Even if we found the answers, as a passionate learner, we are still more curious to do some practical things on our own.
And, here's the answer to all of them. SPICE (Simulation Program for Integrated Circuit Emphasis). This course has answers to almost all questions that you might have as a serious timing analyst
So let's get started and keep those questions coming in the forum, and I will answer all of them.
See you in class !!
Who this course is for:
Anyone interested to know, what drives this $Billion VLSI industryAnyone looking to do some practical and hands-on work on SPICE simulationsAny professional already doing Static Timing Analysis and wants to go into details of delay modelsAnyone looking to stay for a long time in VLSI domain
Instructor Details
- 4.5 Rating
55 Reviews
Kunal Ghosh
Kunal
Ghosh is the Director and co-founder of VLSI System Design (VSD) Corp.
Pvt. Ltd. Prior to launching VSD in 2017, Kunal held
several technical leadership positions at Qualcomm's Test-chip business unit. He joined Qualcomm in 2010. He led the Physical design and STA flow development of 28nm, 16nm test-chips. At 2013, he joined Cadence as Lead Sales Application engineer for Tempus STA tool.
Kunal holds a Masters degree in Electrical Engineering from Indian
Institute of Technology (IIT), Bombay, India and specialized in VLSI
Design & Nanotechnology.
Hands on with Technology @
1) MSM (mobile station mode chips) - MSM chips are used for CDMA modulation/demodulation. It consists of DSPs and microprocessors for running applications such as web-browsing, video conferencing, multimedia services, etc.
2) Memory test chips - Memory test chips are used to validate functionality of 28nm custom/compiler memory as well as characterize their timing, power and yield.
3) DDR-PHY test chips - DDR-PHY test chips are basically tested for high speed data transfer
4) Timing and physical design Flow development for 130nm MOSFET technology node till 16nm FinFET technology node.
5)IR aware STA
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Reviews
- Video Duration:
4h - Price: 11.99 Track Price 11.99 Track Price
- Provider: Udemy
- Year:
2016 - Language:
English - Certificate:
Yes
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